The PCIe-CAN_GPIO contains a wide assortment of industrial I/O. The board is capable of being used in a PC style motherboard to expand capability or it can be a stand-alone board for closed loop control or monitoring. It has all its system I/O mapped into PCI space and available to the host computer.
For applications requiring closed loop control, there is a 32 bit, 125 MHz RISC processor built into the FPGA with associated SDRAM and FLASH. The processor can be programmed with a readily available integrated development environment.
- PCI Express connection to the host computer (X1 standard)
- Altera EP1AGX50DF780C6
- 64 Mbit Load Device
- 64 Mbytes DDR2 SDRAM
- Eight Digital Inputs
- Eight Digital Outputs
- Four CAN 2.0B Data Links (125K/250K/500K/800K/1M)
- Four RS-232 Serial Ports
- User EEPROM
- Programmable Watchdog
- System ID Module
Utilizing a high density FPGA, this board contains most of the logic required to build a monitoring and control system or to build a closed loop control system. The board uses industry standard components to implement functions to enable the reuse of legacy software or readily available software. It comes packaged with Linux drivers and example code to enable rapid development and deployment of the product.
ALTERA EP1AGX50DF780C6 FPGA
- Equivalent Logic Elements 50,160
- Transceiver data rate up to 3.125 Gbps
- Programmed for PCIe X1
- Connections available for PCIe X4
- DDR2, frequency programmable
- 64 Mbytes, single component
- Single component with a 16 bit data interface
FPGA LOAD DEVICE
- Altera EPCS64 or equivalent device
- 64 MBit density
- Fast serial load capable
- Adequate space to store program for FPGA processor and user data
- 8 inputs with voltage and current protection.
- Current limited 12 volt pull up on each channel
- 8 outputs with reverse diode blocking.
- LEDs on each channel to allow visual check of channel state.
- Two RS-232 five wire interfaces: TXD, RXD, RTS, CTS, GND
- Two RS-232 three wire interfaces: TXD and RXD
FOUR CAN 2.0B DATA LINKS
- Four fully independent channels
- Speeds up to 1 Mbit
- Implemented with the NXP SJA1000
- 512 bytes (256 x 16)
- Implemented with a 93CS66 component
- User programmable timeout
- Separate rollover counter
- Generates a digital output
- The JTAG interface is user accessible and is dedicated to programming and debugging FPGA software or custom hardware.
MECHANICAL AND ENVIRONMENTAL DATA
- Operating Temperature: -40 to +70C
- Storage Temperature: -55 to +100C
- Humidity: Commercial 95% non-condensing
- Support for programming the on-board processor requires the execution of a customer support agreement.
- Custom FPGA code is available upon special request.
- Linux driver example source included with example application code.
- Custom software available upon special request.
- PCIe-CAN-GPIO-A - Air Cooled
- PCIe-CAN-GPIO-AE - Air Cooled, Expanded functionality
- Custom software or FPGA design to be quoted separately.
- Datasheet in "pdf" format